The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure. Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in the present disclosure and are not admitted to be prior art by inclusion in this section.
Various error correction solutions have been proposed for non-volatile memory, such as non-volatile memory used in solid state drives (SSDs). Some solutions, for example solutions using hard decision reads of the data, may be performed relatively quickly by a processor. However, certain decoding solutions such as low density parity check (LDPC) based solutions may be used in systems that require additional data which hard decision reads are unable to provide. Soft decision reads of the data may be performed to provide the additional data, however soft decision reads may be relatively slow and incompatible with certain memory technologies.